Добавлена схема и плата выходного релейного модуля
This commit is contained in:
Калинин Сергей Валерьевич
parent
d7cefe193f
commit
e2f3960bf2
3557
relay-output-module/fp-info-cache
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3557
relay-output-module/fp-info-cache
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relay-output-module/relay-output-module.kicad_pcb
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relay-output-module/relay-output-module.kicad_pcb
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(kicad_pcb (version 20211014) (generator pcbnew)
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(general
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(thickness 1.6)
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)
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(paper "A4")
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(layers
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(0 "F.Cu" signal)
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(31 "B.Cu" signal)
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(32 "B.Adhes" user "B.Adhesive")
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(33 "F.Adhes" user "F.Adhesive")
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(34 "B.Paste" user)
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(35 "F.Paste" user)
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(36 "B.SilkS" user "B.Silkscreen")
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(37 "F.SilkS" user "F.Silkscreen")
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(38 "B.Mask" user)
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(39 "F.Mask" user)
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(40 "Dwgs.User" user "User.Drawings")
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(41 "Cmts.User" user "User.Comments")
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(42 "Eco1.User" user "User.Eco1")
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(43 "Eco2.User" user "User.Eco2")
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(44 "Edge.Cuts" user)
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(45 "Margin" user)
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(46 "B.CrtYd" user "B.Courtyard")
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(47 "F.CrtYd" user "F.Courtyard")
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(48 "B.Fab" user)
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(49 "F.Fab" user)
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(50 "User.1" user)
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(51 "User.2" user)
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(52 "User.3" user)
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(53 "User.4" user)
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(54 "User.5" user)
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(55 "User.6" user)
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(56 "User.7" user)
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(57 "User.8" user)
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(58 "User.9" user)
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)
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(setup
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(stackup
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(layer "F.SilkS" (type "Top Silk Screen"))
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(layer "F.Paste" (type "Top Solder Paste"))
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(layer "F.Mask" (type "Top Solder Mask") (thickness 0.01))
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(layer "F.Cu" (type "copper") (thickness 0.035))
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(layer "dielectric 1" (type "core") (thickness 1.51) (material "FR4") (epsilon_r 4.5) (loss_tangent 0.02))
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(layer "B.Cu" (type "copper") (thickness 0.035))
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(layer "B.Mask" (type "Bottom Solder Mask") (thickness 0.01))
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(layer "B.Paste" (type "Bottom Solder Paste"))
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(layer "B.SilkS" (type "Bottom Silk Screen"))
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(copper_finish "None")
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(dielectric_constraints no)
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)
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(pad_to_mask_clearance 0)
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(pcbplotparams
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(layerselection 0x00010fc_ffffffff)
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(disableapertmacros false)
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(usegerberextensions false)
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(usegerberattributes true)
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(usegerberadvancedattributes true)
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(creategerberjobfile true)
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(svguseinch false)
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(svgprecision 6)
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(excludeedgelayer true)
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(plotframeref false)
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(viasonmask false)
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(mode 1)
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(useauxorigin false)
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(hpglpennumber 1)
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(hpglpenspeed 20)
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(hpglpendiameter 15.000000)
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(dxfpolygonmode true)
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(dxfimperialunits true)
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(dxfusepcbnewfont true)
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(psnegative false)
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(psa4output false)
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(plotreference true)
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(plotvalue true)
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(plotinvisibletext false)
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(sketchpadsonfab false)
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(subtractmaskfromsilk false)
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(outputformat 1)
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(mirror false)
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(drillshape 1)
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(scaleselection 1)
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(outputdirectory "")
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)
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)
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(net 0 "")
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(net 1 "unconnected-(K1-Pad3)")
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(net 2 "unconnected-(K1-Pad6)")
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(net 3 "unconnected-(K2-Pad3)")
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(net 4 "unconnected-(K2-Pad6)")
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(net 5 "Net-(K1-Pad8)")
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(net 6 "VCC")
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(net 7 "Net-(K2-Pad8)")
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(net 8 "Net-(K1-Pad4)")
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(net 9 "Net-(K1-Pad5)")
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(net 10 "Net-(K2-Pad4)")
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(net 11 "Net-(K2-Pad5)")
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(net 12 "Net-(K1-Pad2)")
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(net 13 "Net-(K1-Pad7)")
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(net 14 "GNDREF")
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(net 15 "Net-(R1-Pad1)")
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(net 16 "Net-(J5-Pad3)")
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(net 17 "Net-(R1-Pad2)")
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(net 18 "Net-(R2-Pad2)")
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(footprint "Connector_JST:JST_XH_B2B-XH-A_1x02_P2.50mm_Vertical" (layer "F.Cu")
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(tedit 5C28146C) (tstamp 10a1ef3c-608e-40b9-8831-827fd5d5735d)
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(at 132.842 41.4528 90)
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(descr "JST XH series connector, B2B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator")
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(tags "connector JST XH vertical")
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(property "Sheetfile" "relay-output-module.kicad_sch")
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(property "Sheetname" "")
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(path "/6867d230-e143-4892-8a3e-3ad9e85355ba")
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(attr through_hole)
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(fp_text reference "J4" (at 1.25 -3.55 90) (layer "F.SilkS")
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(effects (font (size 1 1) (thickness 0.15)))
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(tstamp 382f1ab9-0cf1-4b16-8a23-c287972865b0)
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)
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(fp_text value "Conn_01x02_Male" (at 1.25 4.6 90) (layer "F.Fab")
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(effects (font (size 1 1) (thickness 0.15)))
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(tstamp e2c7b1b6-7ef6-47cf-acb0-a3df01491971)
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)
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(fp_text user "${REFERENCE}" (at 1.25 2.7 90) (layer "F.Fab")
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(effects (font (size 1 1) (thickness 0.15)))
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(tstamp f1e1ec9f-df52-42a0-8c96-6af958b07874)
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)
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(fp_line (start 5.05 -2.45) (end 3.25 -2.45) (layer "F.SilkS") (width 0.12) (tstamp 060e02d7-e7f7-4596-bfa6-ae3bc0757471))
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||||
(fp_line (start 5.06 3.51) (end 5.06 -2.46) (layer "F.SilkS") (width 0.12) (tstamp 0bdd8cf4-5602-4532-a849-b4a05047352b))
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(fp_line (start 3.25 -2.45) (end 3.25 -1.7) (layer "F.SilkS") (width 0.12) (tstamp 181942c6-34c5-410f-99cb-200478128871))
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||||
(fp_line (start -0.75 -1.7) (end -0.75 -2.45) (layer "F.SilkS") (width 0.12) (tstamp 2d2611c2-1920-4bc6-b38e-c2beb8a12e37))
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(fp_line (start -2.55 -0.2) (end -1.8 -0.2) (layer "F.SilkS") (width 0.12) (tstamp 54202d4b-2d56-460f-adde-4742d52c8155))
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||||
(fp_line (start 0.75 -2.45) (end 0.75 -1.7) (layer "F.SilkS") (width 0.12) (tstamp 5af5e90a-9571-4424-b9a1-438288531d76))
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||||
(fp_line (start 0.75 -1.7) (end 1.75 -1.7) (layer "F.SilkS") (width 0.12) (tstamp 60282c39-a729-4b03-8557-0c8580fff59c))
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(fp_line (start 3.25 -1.7) (end 5.05 -1.7) (layer "F.SilkS") (width 0.12) (tstamp 6fefff6a-3464-43de-8da3-6bdad58576bd))
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||||
(fp_line (start 4.3 2.75) (end 1.25 2.75) (layer "F.SilkS") (width 0.12) (tstamp 7f5cbdd9-d263-4597-a7dc-24335e7c73e1))
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(fp_line (start -2.55 -1.7) (end -0.75 -1.7) (layer "F.SilkS") (width 0.12) (tstamp 96e79b3e-fa1f-44e8-aa32-30c970d178b0))
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(fp_line (start 5.06 -2.46) (end -2.56 -2.46) (layer "F.SilkS") (width 0.12) (tstamp 991176fd-e783-4303-8d16-0f27d6b55108))
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(fp_line (start -2.85 -2.75) (end -2.85 -1.5) (layer "F.SilkS") (width 0.12) (tstamp 9f2ca17b-8b85-4b7b-8f15-b0c2708de793))
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(fp_line (start -0.75 -2.45) (end -2.55 -2.45) (layer "F.SilkS") (width 0.12) (tstamp b2c44015-a003-4d2e-be74-8f2f0de6e7d2))
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||||
(fp_line (start 4.3 -0.2) (end 4.3 2.75) (layer "F.SilkS") (width 0.12) (tstamp baf9872b-cc42-4da9-8e69-f008ddce5b8d))
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||||
(fp_line (start -1.6 -2.75) (end -2.85 -2.75) (layer "F.SilkS") (width 0.12) (tstamp c4d8de42-baaa-467a-9b86-37878c264128))
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||||
(fp_line (start -1.8 2.75) (end 1.25 2.75) (layer "F.SilkS") (width 0.12) (tstamp c6c8ec1f-ab2c-43e4-80e9-6ab2d5fb900d))
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||||
(fp_line (start 1.75 -1.7) (end 1.75 -2.45) (layer "F.SilkS") (width 0.12) (tstamp df7d55c3-f666-44f5-aed0-72b75594c387))
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||||
(fp_line (start 5.05 -0.2) (end 4.3 -0.2) (layer "F.SilkS") (width 0.12) (tstamp df8eaf1b-51a5-4525-9949-a8cb07bc0ed0))
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||||
(fp_line (start -1.8 -0.2) (end -1.8 2.75) (layer "F.SilkS") (width 0.12) (tstamp dfb249b5-e6d9-4284-83c6-0b1181333dba))
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||||
(fp_line (start 1.75 -2.45) (end 0.75 -2.45) (layer "F.SilkS") (width 0.12) (tstamp eb2d49ea-3be4-40c7-8f3e-ac62dbfb4f37))
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||||
(fp_line (start -2.55 -2.45) (end -2.55 -1.7) (layer "F.SilkS") (width 0.12) (tstamp f220f32c-fd16-4cab-a5c2-220d3e2647c3))
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||||
(fp_line (start -2.56 3.51) (end 5.06 3.51) (layer "F.SilkS") (width 0.12) (tstamp f651e408-059e-4eb0-ba2e-f855e64ad8c2))
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||||
(fp_line (start 5.05 -1.7) (end 5.05 -2.45) (layer "F.SilkS") (width 0.12) (tstamp f6658c19-48c2-4bfd-8017-1b4036ced176))
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||||
(fp_line (start -2.95 -2.85) (end -2.95 3.9) (layer "F.CrtYd") (width 0.05) (tstamp 45ec2a10-ea9a-4c1b-a9e9-6df39ee85248))
|
||||
(fp_line (start 5.45 3.9) (end 5.45 -2.85) (layer "F.CrtYd") (width 0.05) (tstamp de0e74b3-dfb3-406a-a076-89fa0183b074))
|
||||
(fp_line (start -2.95 3.9) (end 5.45 3.9) (layer "F.CrtYd") (width 0.05) (tstamp e460ef23-031b-4228-9e1e-a7eb66f94c21))
|
||||
(fp_line (start 5.45 -2.85) (end -2.95 -2.85) (layer "F.CrtYd") (width 0.05) (tstamp f837ef7d-91ef-4c4a-8c5b-ff1e0d024778))
|
||||
(fp_line (start -2.45 3.4) (end 4.95 3.4) (layer "F.Fab") (width 0.1) (tstamp 03b4cebc-2887-4d1f-84fb-516edb27049e))
|
||||
(fp_line (start 0 -1.35) (end 0.625 -2.35) (layer "F.Fab") (width 0.1) (tstamp 0fcc99cc-d189-4811-a79a-fdd67f379fbd))
|
||||
(fp_line (start -2.45 -2.35) (end -2.45 3.4) (layer "F.Fab") (width 0.1) (tstamp 27d0d39d-3e86-473a-8ea0-6660f01f8ffc))
|
||||
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|
||||
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|
||||
(fp_line (start -0.625 -2.35) (end 0 -1.35) (layer "F.Fab") (width 0.1) (tstamp 8bd5b39f-2cb0-4dcf-9759-9cdf00088e20))
|
||||
(pad "1" thru_hole roundrect (at 0 0 90) (size 1.7 2) (drill 1) (layers *.Cu *.Mask) (roundrect_rratio 0.147059)
|
||||
(net 12 "Net-(K1-Pad2)") (pinfunction "Pin_1") (pintype "passive") (tstamp 09f1c94e-5bf4-419d-9818-dc341c775c8f))
|
||||
(pad "2" thru_hole oval (at 2.5 0 90) (size 1.7 2) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 13 "Net-(K1-Pad7)") (pinfunction "Pin_2") (pintype "passive") (tstamp 66220c29-ce32-4c51-a865-0dae3d460faf))
|
||||
(model "${KICAD6_3DMODEL_DIR}/Connector_JST.3dshapes/JST_XH_B2B-XH-A_1x02_P2.50mm_Vertical.wrl"
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||||
(offset (xyz 0 0 0))
|
||||
(scale (xyz 1 1 1))
|
||||
(rotate (xyz 0 0 0))
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||||
)
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||||
)
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||||
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||||
(footprint "Diode_THT:D_5W_P10.16mm_Horizontal" (layer "F.Cu")
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||||
(tedit 5AE50CD5) (tstamp 28982396-391b-4bc2-95c3-88fe3d455323)
|
||||
(at 113.03 56.4388 90)
|
||||
(descr "Diode, 5W series, Axial, Horizontal, pin pitch=10.16mm, , length*diameter=8.9*3.7mm^2, , http://www.diodes.com/_files/packages/8686949.gif")
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||||
(tags "Diode 5W series Axial Horizontal pin pitch 10.16mm length 8.9mm diameter 3.7mm")
|
||||
(property "Sheetfile" "relay-output-module.kicad_sch")
|
||||
(property "Sheetname" "")
|
||||
(property "Spice_Netlist_Enabled" "Y")
|
||||
(property "Spice_Primitive" "D")
|
||||
(path "/92b4415e-b3ea-4512-b07f-1fdb2364bd14")
|
||||
(attr through_hole)
|
||||
(fp_text reference "D1" (at 5.842 0 90) (layer "F.SilkS")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
(tstamp 4432c327-1ad5-4dfc-92d4-5f5891ccc1de)
|
||||
)
|
||||
(fp_text value "N4007" (at 5.08 2.97 90) (layer "F.Fab")
|
||||
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|
||||
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|
||||
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|
||||
(fp_text user "K" (at 2.9972 -0.1016 90) (layer "F.SilkS")
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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75
relay-output-module/relay-output-module.kicad_prl
Normal file
75
relay-output-module/relay-output-module.kicad_prl
Normal file
|
|
@ -0,0 +1,75 @@
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|
||||
434
relay-output-module/relay-output-module.kicad_pro
Normal file
434
relay-output-module/relay-output-module.kicad_pro
Normal file
|
|
@ -0,0 +1,434 @@
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1,
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||||
0,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
2,
|
||||
1,
|
||||
2,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
2,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
2,
|
||||
1,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2
|
||||
]
|
||||
],
|
||||
"rule_severities": {
|
||||
"bus_definition_conflict": "error",
|
||||
"bus_entry_needed": "error",
|
||||
"bus_label_syntax": "error",
|
||||
"bus_to_bus_conflict": "error",
|
||||
"bus_to_net_conflict": "error",
|
||||
"different_unit_footprint": "error",
|
||||
"different_unit_net": "error",
|
||||
"duplicate_reference": "error",
|
||||
"duplicate_sheet_names": "error",
|
||||
"extra_units": "error",
|
||||
"global_label_dangling": "warning",
|
||||
"hier_label_mismatch": "error",
|
||||
"label_dangling": "error",
|
||||
"lib_symbol_issues": "warning",
|
||||
"multiple_net_names": "warning",
|
||||
"net_not_bus_member": "warning",
|
||||
"no_connect_connected": "warning",
|
||||
"no_connect_dangling": "warning",
|
||||
"pin_not_connected": "error",
|
||||
"pin_not_driven": "error",
|
||||
"pin_to_pin": "warning",
|
||||
"power_pin_not_driven": "error",
|
||||
"similar_labels": "warning",
|
||||
"unannotated": "error",
|
||||
"unit_value_mismatch": "error",
|
||||
"unresolved_variable": "error",
|
||||
"wire_dangling": "error"
|
||||
}
|
||||
},
|
||||
"libraries": {
|
||||
"pinned_footprint_libs": [],
|
||||
"pinned_symbol_libs": []
|
||||
},
|
||||
"meta": {
|
||||
"filename": "relay-output-module.kicad_pro",
|
||||
"version": 1
|
||||
},
|
||||
"net_settings": {
|
||||
"classes": [
|
||||
{
|
||||
"bus_width": 12.0,
|
||||
"clearance": 0.2,
|
||||
"diff_pair_gap": 0.25,
|
||||
"diff_pair_via_gap": 0.25,
|
||||
"diff_pair_width": 0.2,
|
||||
"line_style": 0,
|
||||
"microvia_diameter": 0.3,
|
||||
"microvia_drill": 0.1,
|
||||
"name": "Default",
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||
"track_width": 0.25,
|
||||
"via_diameter": 0.8,
|
||||
"via_drill": 0.4,
|
||||
"wire_width": 6.0
|
||||
}
|
||||
],
|
||||
"meta": {
|
||||
"version": 2
|
||||
},
|
||||
"net_colors": null
|
||||
},
|
||||
"pcbnew": {
|
||||
"last_paths": {
|
||||
"gencad": "",
|
||||
"idf": "",
|
||||
"netlist": "",
|
||||
"specctra_dsn": "",
|
||||
"step": "",
|
||||
"vrml": ""
|
||||
},
|
||||
"page_layout_descr_file": ""
|
||||
},
|
||||
"schematic": {
|
||||
"annotate_start_num": 0,
|
||||
"drawing": {
|
||||
"default_line_thickness": 6.0,
|
||||
"default_text_size": 50.0,
|
||||
"field_names": [],
|
||||
"intersheets_ref_own_page": false,
|
||||
"intersheets_ref_prefix": "",
|
||||
"intersheets_ref_short": false,
|
||||
"intersheets_ref_show": false,
|
||||
"intersheets_ref_suffix": "",
|
||||
"junction_size_choice": 3,
|
||||
"label_size_ratio": 0.375,
|
||||
"pin_symbol_size": 25.0,
|
||||
"text_offset_ratio": 0.15
|
||||
},
|
||||
"legacy_lib_dir": "",
|
||||
"legacy_lib_list": [],
|
||||
"meta": {
|
||||
"version": 1
|
||||
},
|
||||
"net_format_name": "",
|
||||
"ngspice": {
|
||||
"fix_include_paths": true,
|
||||
"fix_passive_vals": false,
|
||||
"meta": {
|
||||
"version": 0
|
||||
},
|
||||
"model_mode": 0,
|
||||
"workbook_filename": ""
|
||||
},
|
||||
"page_layout_descr_file": "",
|
||||
"plot_directory": "",
|
||||
"spice_adjust_passive_values": false,
|
||||
"spice_external_command": "spice \"%I\"",
|
||||
"subpart_first_id": 65,
|
||||
"subpart_id_separator": 0
|
||||
},
|
||||
"sheets": [
|
||||
[
|
||||
"f797e255-4ac0-426d-9edf-4fc827098926",
|
||||
""
|
||||
]
|
||||
],
|
||||
"text_variables": {}
|
||||
}
|
||||
1486
relay-output-module/relay-output-module.kicad_sch
Normal file
1486
relay-output-module/relay-output-module.kicad_sch
Normal file
File diff suppressed because it is too large
Load Diff
Loading…
Reference in New Issue
Block a user